RapidIO.org has continued to be very active with continued specification development, attending and presenting at several key industry events and with several new members joining the community. Here is a look back at the significant RapidIO.org related events and news from the Spring and Summer of 2015.
New RapidIO.org Members
RapidIO.org Recent News
- Jul 14 Enabling Heterogeneous Solutions Using Standard Communication Middleware – Article by: Girish Shirasat of Concurrent Technologies covering enabling open standard communication middleware for High Performance Embedded Computers (HPEC).
- Jul 15 IDT Launches Open High-Performance Analytics and Computing Lab to Integrate RapidIO Interconnect with Heterogeneous Platforms -Integrated Device Technology, Inc. has launched an Open High-Performance Analytics and Computing (HPAC) Lab to address the real-time application needs of enterprise and cloud computing end users. The lab supports heterogeneous processing technologies from industry-leading CPUand accelerator vendors who are connecting their hardware with IDT’s portfolio of RapidIO® and PCIe® interconnect semiconductors, advanced timing and memory interface products.
- Jul 29 IDT’s RapidIO Solutions Enable Fujitsu’s C-RAN Deployments – IDT’s RapidIO Gen2 products have been adopted by Fujitsu in its latest generation of wireless base stations. These systems are being deployed in production today in support of Cloud Radio Access Network (C-RAN) cellular network architectures and LTE and next generation LTE-A wireless standards, among others.
RapidIO.org Technical Working Group – Chaired by Barry Wood, IDT
Chaired by Barry Wood of IDT, the RapidIO.org Technical Working Group consist of several Task Groups working on various specification development efforts that will be integrated into the RapidIO.org specification stack. Participation in these Task Groups is open to all active RapidIO.org members.
ARM 64-bit Coherent Scale Out Task Group – Chaired by Sam Fuller, Freescale
The ARM 64-bit Coherent Scale Out over RapidIO Task Group is responsible for developing a specification for multi SoC / core coherent scale out of ARM 64-bit cores with the following functionality:
- coherent scale out of a few 10s to 100s cores & 10s of sockets
- ARM AMBA® protocol mapping to RapidIO protocols
- AMBA 4 AXI4/ACE mapping to RapidIO protocols
- AMBA 5 CHI mapping to RapidIO protocols
- Migration path from AXI4/ACE to CHI and future ARM protocols
- support for NPU / GPU/ DSP / FPGA heterogeneous systems
- HW hooks and definition to support RDMA, MPI, secure boot, authentication, SDN, Open Flow, Open Data Plane, etc
- Other functionality as necessary to for performance critical computing – support Data Center, HPC and Networking Infrastructure system development and deployment
Software Task Group – Chaired by Barry Wood, IDT
The RapidIO Software Task Group is responsible for developing open source interface definitions and APIs using the “C” language under the Linux operating system for the following functionality:
- Linux Kernel enhancements for RapidIO fabrics and endpoints
- “Raw Driver” interfaces which support all endpoints
- Fault tolerance / hot swap support
- Customizable / optional enumeration / fabric discovery
- Data Path Library for high performance data transfers between RapidIO endpoints
- RDMA, Sockets, and Channelized Messaging
- Reference implementation uses “Raw driver”
- User Mode Driver for maximum performance
- Fabric Management Library and Command Line Interpreter for RapidIO fabrics and endpoint management
- Uses “Raw Driver” interfaces
- Portable across endpoints and operating systems
- Command Line Interpreter for basic configurability
100G+ PHY Task Group – Chaired by Chris Shelsky, Nexus Technology
The 100G+ PHY Task Group charter is to develop higher performance PHY specifications for the RapidIO protocol with the following requirements:
- Determine and define 25G per lane or greater PHY leveraging industry standard specification(s)
- Evaluate and confirm PHY definition will improve or maintain existing PHY characteristics
- Improve power efficiency
- Maintain asymmetric link operation
- Maintain low latency characteristics
- Maintain fault tolerant characteristics
- Maintain reliability characteristics assuming a bit error rate of less than 10^-12
- Specify a low latency PHY suitable for dual and quad-socket cache coherency applications
- Outline and prioritize additions/improvements to the PHY feature set
- Other additions and improvements to the PHY feature set as requested
RapidIO.org Marketing Working Group – Chaired by Ravi Thummarukudy, Mobiveil
The RapidIO.org Marketing Working Group manages the promotion of RapidIO unified fabrics and related products. The group meets regularly to plan for participation in various industry conferences and exhibitions.
- June 10, 2015 Linley Carrier Conference RapidIO.org members Mobiveil and Mirabilis Design attended the 2015 Linley Carrier Conference. Mobiveil provided information about their Gen2 and Gen 3(10xN) RapidIO IP blocks and Mirabilis Design demonstrated High Performance HSA Computer for Carrier application. Trevor Hiatt, product manager at Integrated Device Technology (IDT) also gave a presentation titled “Supercomputing at the Edge with Serial RapidIO”, view Trevor’s presentation here.
- June 11, 2015 CERN Meet Up with OCP HPC Project RapidIO.org Executive Director, Rick O’Connor presented a RapidIO.org Update on Supercomputing and HPC.
- June 22-25,2015 FTF 2015 RapidIO.org attended the Freescale Technology Forum (FTF 2015) along with member companies Freescale, FET Corp, Starbridge, and System Fabric Works to demonstrate a multi-vendor setup using RapidIO as a unified fabric to scale out a cluster of 6 Freescale T4 processors. RapidIO.org also presented a technical session titled: RapidIO Unified Fabric for QorIQ T4 Series Scale Out.
- June 29-30, 2015 2nd RISC-V Workshop RapidIO.org Executive Director, Rick O’Connor presented a RapidIO update at this workshop, view Ricks’ presentation here.
- July 12-16,2015 ISC Frankfurt 2015 RapidIO.org attended along with member companies Concurrent Technologies, IDT ,N.A.T., Prodrive Technologies and Texas Instruments the 2015 ISC High Performance Conference. Demonstrations included: Concurrent’s modular based approach to heterogeneous computing; IDT’s High Performance Analytics Lab with Heterogeneous RapidIO based low latency computing; N.A.T.‘s high performance platforms which interconnect to external networks through multiple low latency copper/optical RapidIO and 10 GbE interfaces; Prodrive demonstrated their latest building blocks and infrastructure technology for heterogeneous HPC, based on low-latency RapidIO switching technology; and TI demonstrated applications built on convolutional neural networks (CNNs) and graph libraries running on HP Moonshot with m800 cartridges featuring TI SoCs with ARM A15s and C66x DSPs.
Please contact RapidIO.org for information on upcoming events and participation details.
- Oct 6-7, 2015 Linley Processor Conference Join RapidIO.org at the Linley Processor Conference October 6-7, 2015 and visit our table-top exhibit during the evening reception.
- Nov 10, 2015 RapidIO.org Annual General Meeting Only open to RapidIO.org members. Face-to-face AGM in San Jose, CA.
- Nov 16-20, 2015 – Supercomputing Austin 2015 Join RapidIO.org along with member companies A3Cube, Integrated Device Technology (IDT), Prodrive Technologies and Texas Instruments at the SC15 Conference at booth #2917.
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