Stratix GX

Altera

Description:

Stratix™ GX FPGAs give system architects a low-risk path to 3.125 Gbps transceiver applications. Based on Altera's Stratix architecture, Stratix GX devices fuse the industry's fastest FPGA architecture with high-performance multi-gigabit transceiver technology. With up to 20 full-duplex transceiver channels operating at up to 3.125 gigabits per second (Gbps) per channel, Stratix GX devices address the needs for high-speed backplane and chip-to-chip communications. In addition, Stratix GX devices feature embedded equalization circuitry, a very low power per quad transceiver block, and 40" FR4 backplane drive capability. Stratix GX devices also offer source-synchronous differential signaling with dedicated dynamic phase alignment (DPA) circuitry operating at up to 1 Gbps. The Stratix GX programmable logic core enables designers to implement proprietary functionality in minimal time, achieve very high system performance, and differentiate their products in the marketplace at very low risk.
Built on a 1.5-V, 0.13-µm, all-layer-copper SRAM process, Stratix GX devices are available in densities ranging from 10,570 to 41,250 logic elements (LEs) and with up to 3 megabits (Mbits) of RAM. Stratix GX devices are capable of 1 Gbps source-synchronous differential I/O signaling, supporting differential I/O electrical standards and feature DPA. These devices support several high-speed protocols-including the Serial RapidIO standard. Stratix GX devices also feature a complete clock management solution with its hierarchical clock structure and up to eight phase-locked loops (PLLs), and offers up to 14 DSP blocks with up to 112 (9-bit x 9-bit) embedded multipliers, optimized for complex applications that require high data throughput.
Please visit the Stratix GX Home Page

Categories:

Semiconductors Semiconductors > Programmable Logic