XMC-FPGA05F

VMETRO

Contact:

Nicole Renfro
Marketing Manager

Description:

Incorporating quad fiber-optic transceivers with a user programmable Xilinx Virtex-5 FPGA, the XMC-FPGA05F XMC/PMC module combines data processing and I/O in a single module. The FPGA is closely coupled to all interfaces to minimize data bottlenecks. The XMC-FPGA05F can be used for a wide range of tasks including remote sensor I/O, data recording and linking systems in real-time. The FPGA can be used to implement custom protocols, data encryption or a network processor.

The XMC-FPGA05F is designed to be a user programmable FPGA resource and can be supplied with a choice of Xilinx Virtex-5 FPGAs including SX95T or LX155T (-2 speed grade) parts. The FPGA configuration can be updated and controlled by the host across the PCI/PCI-X or PCI Express (PCIe) interfaces using the FLASH memory to store images. The host issues commands over the PCI/PCIe interface to cause FPGA reconfiguration from any of the stored images.

Up to four full duplex fiber-optic transceivers can be fitted to the XMC-FPGA05F for front panel connections. The transceivers can be supplied in frequencies ranging from 1.0625 to over 3Gbps with single and multi-mode options. Each transceiver is driven directly by an FPGA RocketIO high-speed serial (HSS) link and gives the developer full control over the fiber-optic data protocol.

The XMC-FPGA05F features four banks of DDR2 SDRAM connected to and controlled by the FPGA. Each of the SDRAM banks has a capacity of 128Mbytes and provides a 16-bit data path. When clocked at 250MHz, each SDRAM bank is capable of bandwidths approaching 1Gbyte/sec.

The XMC-FPGA05F includes a PCI/PCI-X interface, supporting up to 133MHz operation, and a PCIe interface. Depending on the interface being used, the board provides at least four DMA controllers. The PCIe interface uses the Virtex-5 FPGA's RocketIO HSS transceivers and an embedded end-point controller, which is a hard IP block within the Virtex-5 FPGA. The built-in PCIe end-point block supports x4 or x8 lane communications, but can be bypassed to support other protocols like Aurora, sFPDP or Serial RapidIO® (sRIO).

A range of environmental requirements are addressed by the XMC-FPGA05F including commercial, air-cooled rugged and conduction-cooled.

Categories:

Boards and Modules Boards and Modules > DSP/Image Processing Boards and Modules > I/O