RapidIO Interface IP Cores

by

Jennic Ltd

http://www.jennic.com
Contact:
Frank Newcombe
Wireline IP Business Development Manager
Download:
j-rio.pdf
Description:
Jennic's RapidIO system-level IP product line provides a complete range of fully integrated RapidIO interface solutions, intended for integration into SoC semiconductor devices.

It is based around a generic, modular architecture from which a variety of solutions can be easily created to effectively and efficiently address customers specific requirements.

Each solution is based around the following underlying blocks:

- Serial Physical Interface

- Generic Endpoint Transport Layer Controller

- Logical Layer Controllers
o Input/Output Logical Layer Controller (Register)
o Input/Output Logical Layer Controller (Transparent)
o Message Passing Logical Layer Controller (Queue)

- Host Bus Interfaces
o ARM (AMBA/AHB)
o MIPS
o PowerPC (PLB/CoreConnect)
o PCI
Categories:
Intellectual Property Intellectual Property > Bus Interfaces Intellectual Property > RapidIO Endpoint Solutions