MM-1550

VMETRO

Contact:

Nicole Renfro
Marketing Manager

Description:

Quad FPGA VXS Serial RapidIO Intelligent IO Carrier

Features
- Two CoSine 2VP100 System-on-Chips
- Two Xilinx Virtex-4 LX160 CoSine Companion Devices
- Two XMC/PMC sites
- 14 independent memory arrays with total bandwidth of over 40 GB/s
- Four embedded PowerPC processors
- Complete Serial RapidIO x4 connectivity
- VITA 41 format
- Rugged Air Cooled and Conduction Cooled versions

Description

The MM-1550 combines the industrys most powerful System-on-Chip, CoSine, with the application optimized architecture of an Othello VME carrier.

Mezzanine Sites
Mezzanine sites on the MM-1550 can support either PMCs or XMCs. Configured for PMC support, each PCI bus can operate in 32-bit or 64-bit PCI 2.3 mode at up to 66MHz or in 64-bit PCI-X mode at up to 133MHz. Configured for XMCs, the sites can support the Aurora protocol with four MGTs or Serial RapidIO x4.

Backplane Connectivity
In addition to having a VME320 2eSST interface on P1, the MM-1550 is the first VME board to include complete on-board Serial RapidIO switch fabric connectivity, with two independent Serial RapidIO ports on P0 per the VITA VxS 41.2 specification. Alternatively, two Aurora ports can be configured to P0 per the VITA 41.5 and VITA 55 draft standards.

Xilinx Virtex- 4 LX160 and Logic Slices
The MM-1550 is the first VME board to include the Virtex-4 LX series of FPGAs from Xilinx. The LX device is notable in the large amount of FPGA slices that it provides for logic intensive implementations.

CoSine Compute Nodes
The MM-1550 contains two independent CoSine Compute Nodes (CCNs). A single CCN is comprised of a CoSine Primary Device (Virtex-II Pro 2VP70), a CoSine Companion Device (Virtex-4 LX160) see CoSine and CoSine Companion Device Configurations and the following:

Two embedded PowerPC 405GP processors

One multi-ported primary DDR array, up to 1GB, for seamless bus translation between the mezzanine port and crossbar or backplane port

Two dedicated 128MB DDR arrays local to each PowerPC processor

Four independent 9MB QDR II SRAM arrays local to the LX160 for FPGA processing operations

Categories:

Boards and Modules Boards and Modules > DSP/Image Processing Boards and Modules > I/O Embedded Systems > Embedded Computing Embedded Systems > Embedded Systems Embedded Systems > Image Processing Embedded Systems > Military and Defense Systems