RapidIO Connections - January 2003
It's Cool to be HIP 
Jim Parisien, Product Manager, DST and Partner Programs, Tundra Semiconductor
There are many switch fabric technologies that are competing for designers' attention as the next high-speed interconnect standard. The battlefronts have formed. Specifications, vendor alliances, and hype are weapons being used. Which technology will win? How can you separate the hype from reality? The battle continues in the media, but it will be won in your lab. The race for silicon is on! Today's markets and competitive battlefield offers no forgiveness to companies who pick the wrong technology and find out late in development that their assumptions were wrong. The claims switch fabric vendors are making will be verified. Multi-vendor interoperability will be proven and semiconductor real availability exposed. So perhaps one of the criteria we should be considering when looking at switch fabric technologies is how easy will it be for designers to get to the "real" story? The RapidIO Trade Association has recognized the need to provide the designer with the ability to verify these claims and make the decision to invest in RapidIO as easy as possible. To this end, the Hardware Interoperability Platform (HIP) standard was defined. HIP is designed to be a common interoperability testing platform for RapidIO based semiconductor, diagnostic tool, and RTOS vendors. The HIP platform enables designers to test interoperability, features, and performance claims easily. The HIP was defined to flexibly meet individual vendors requirements while maintaining electrical and mechanical compatibility. The HIP consists of 2 types of RapidIO boards: a base motherboard and plug-in cards. The HIP document describes only form factors, connector types, and pin outs to ensure the goal of multi-vendor compatibility while preserving the flexibility to innovate around individual vendor requirements. Hardware Interoperability Platform (HIP) Specification  |