RapidIO Connections - December 2003
Word from the President
At the October face to face meeting held in Chicago, the RapidIO Trade Association Steering Committee approved the creation of a new participation class within the RapidIO Trade Association. The Auditing class of participation provides access to both published and in progress specifications, meeting minutes and meeting attendance with approval of the meeting chairperson. While an auditing level of participation does not provide voting rights for specification development it does provide substantially more visibility into the RapidIO Trade Association and early access to pre-approved specifications, some times up to a year ahead of general availability. This level of participation and is comparable to that offered to members of the PCI SIG, VITA and PICMG. The creation of this participation class was motivated by companies who were interested in the RapidIO technology and in staying up to date with the technology but could not justify the time and financial commitment associated with regular membership in the RapidIO Trade Association. As an auditing participant, a company can add any number of participants as monitors of any number of RapidIO workgroups or task groups. Auditing participation is available to commercial entities for a $2500 USD annual fee. Register your interest in joining at this level by visiting the following RapidIO webpage: http://www.RapidIO.org/meminfo New MWG Chair Also in this newsletter, John Petris of Analog Devices, who was recently approved as Chair of the RapidIO Trade Association Marketing Working Group, shares his thoughts on the future of RapidIO in DSP applications. We thank Kalpesh Gala, of IBM for his terrific efforts as MWG Chair over the last year and a half. Seminar on RapidIO in Wireless Infrastructure In October, Texas Instruments, presented a TechOnline web-based seminar on RapidIO applications in wireless infrastructure. Archives of this presentation are available for viewing anytime at: http://seminar2.techonline.com/~rapidio/oct0803/index.shtml New White Papers This newsletter provides links to two new white papers on RapidIO. One paper, published though the AnalogZone, written by a Motorola design engineer provides details on what it takes to implement RapidIO in silicon. The second article, published in the CommsDesign section of the EETimes website, is a deep dive into the RapidIO protocol stack and the reasons why it operates the way it does.
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