RapidIO Connections - December 2003
TWG Update The embedded marketplace faces an alphabet soup of chip-to-chip and board-level interconnect standards. System-level interconnects, however, stand apart in their breadth of application and required flexibility. Engineering is about tradeoffs. Many interconnects severely compromise their ability to act as a system interconnect when they tradeoff complexity, extensibility and performance. RapidIO is unique in its ability to address not just its initial application as a chip-to-chip control plane interconnect but system-level tasks as well. System-level interconnects have unique requirements up and down the specification layers in order to efficiently carry both control and data plane traffic. For example, such an interconnect would include a logical layer with an extensive set of transaction types over multiple classes of service, a transport layer that allows arbitrary large-scale system topologies and a physical layer that supports multiple serial lanes leveraging contemporary industry standard PHY technology. Responding to member companies, the Technical Working Group has been working actively for the past two years to extend RapidIO into the data plane. This was driven by member companies who understood the system-level potential of RapidIO and wished to reduce the cost burden involved in supporting many different interconnects. The fruits of this long term effort began with the recent release of the Flow Control Extensions Specification. With flow control complete, look for new system-level capabilities in the future including encapsulation, enhanced Quality-of-Service and thousands of traffic streams. Meanwhile, the Technical Working Group continues to follow industry developments in defining 5-10 Gb/s PHY standards. In adding any new capability, backward compatibility becomes an immediate concern. RapidIO defines backward compatibility such that existing devices may connect to and interoperate in networks built with devices supporting future enhancements. Unlike competing system-level interconnects, RapidIO will not require dedicated logic to bridge traffic produced by existing devices. While these devices might not be able to fully participate in these new enhancements, it will still be possible to connect to a network and exchange traffic thus preserving existing investments going forward. The Technical Working Group continues to work on enhancements aimed at positioning RapidIO as the system-level interconnect of choice in the embedded marketplace. In taking this role, it promises to reduce your system and engineering costs.
Greg Shippen 
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