RapidIO Connections - February 2004
QNX and Motorola Web Seminar: RapidIO and QNX Neutrino RTOS - a seamless fitThe demand for broadband networking is exploding. With data expected to generate 98 percent of network traffic in less than 10 years, voice and data communications technologies are converging to create multi-service platforms. The increasing bandwidth needs in netcom systems have spurred the development of several new, high-performance interconnects, among them RapidIO. RapidIO is a packet-switched, high-speed architecture targeted at distributed- memory multiprocessor systems. Compared to traditional shared buses, RapidIO uses a de-centralized, point-to-point architecture and supports both message passing with a non-coherent memory model and a globally shared distributed memory model. The QNX Neutrino RTOS, with its message-passing architecture, is an automatic choice for creating distributed systems using RapidIO. Join Shiv Nagarajan, a core operating system engineer for QNX Software Systems, and Greg Shippen, system archictect for Motorola, and chairman of the Technical Working Group for the RapidIO Trade Association, for a technical web seminar on how software engineers can take advantage of RapidIO's many advanced features, including its mechanisms for dynamic discovery, enumeration error handling and recovery. This Web seminar also explores how QNX Neutrino message-passing architecture and RapidIO form a seamless fit. To view an archive of this Web seminar, visit: |